San Francisco State University

Electrical and Computer Engineering

 

Course Outline:

 ENGR857 Reconfigurable Computing

 

Spring 2008

 

Class location:  HSS201

Class Schedule: W 18:10-20:55

 

Instructor:           

Ying Chen, Ph.D.

Office hours:         MT 12:30 - 14:00 or by appointment

Office:                    SCI 122

URL:                       http://online.sfsu.edu/~yingchen/ENGR857/ENGR857_home.html

 

Textbook:             

None

 

Reference Textbook:   

'Introduction to Reconfigurable Computing, Architectures, Algorithms, and Applications,' by Christophe Bobda, University of Kaiserslautern, Germany, Published by Springer, 2007

 

Notes on Evaluation:

 

Midterm exam: April 2nd, in class

 

  • There will be NO make-ups and NO incomplete grades without a verified excuse.
  • All homeworks are due at the start of class on the Tuesday of the indicated due week. If you can not make it to the class, please ask your friend to bring it at the start of class. No late homework will be accepted.
  • Any questions about grading must be brought to the attention of the grader or the instructor within one week after the item in question is returned. Your request must include a short written statement describing your question or concern.
  • Everyone is responsible for his/her own enrollment into the course.

 

Notes on Prerequisites:

Engineering students must have a copy of the course approval form on file.

 

Grading Policy:

          100       90        86        82        78         74        70        66        62          58         54         50        0

     |     A    |   A-    |    B+   |    B    |     B-    |   C+   |    C     |    C-   |    D+    |     D    |    D-    |    F    |

 

Notes

No cell phone calls. No food. Allowances for special circumstances for emergencies will be made on a case-by-case basis.

 

 Bulletin Description:        

This course covers the concept, hardware platforms and software support systems for reconfigurable computing (RC) using field programmable gate arrays (FPGAs). An FPGA device is made of an array of programmable logic blocks and programmable switches that connect the blocks. Reconfigurable computing takes advantage of the programmability of FPGAs and modifies the configuration of the logic blocks and switches on the FPGA to build new functional units that better match application hardware requirements

   

Prerequisites:

Knowledge of computer architecture, algorithm, operating system, digital design and design automation are required. (ENGR 851: Advanced Microprocessor Architecture; ENGR 378: Digital System Design; ENGR 456: Computer System)

 

 

Course Topics:

    1. Basic concept of RC
    2. Static vs. dynamic reconfiguration
    3. Operating system support for RC
    4. Compiler support for RC
    5. Examples of successful RC applications
    6. Examples of existing RC architectures
    7. New RC architecture and future trend

 

Evaluation:

 

1. Class discussion and participation...….…...........................................         10%

2.Midterm Exam..........................30%

3.Homework assignments........………............. 30%

4.Final written project report..............15%

5.Final oral project presentation ............15%